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"Synthesizing Parallel Programming Models for Asymmetric Multi-Core Systems", Proceedings of the 11th Workshop on High Performance Embedded Computing, MIT Lincoln Lab, 2007.
"System-level, Thermal-aware, Fully-loaded Processor Scheduling", Proceedings of the 4th Workshop on High-performance, Power-aware Computing (HPPAC), Miami, FL, pp. 8 pgs, 2008.
A Memory-Centric Characterization of ASCI Applications Via A Combined Approach of Statistical and Empirical Analysis
"A Memory-Centric Characterization of ASCI Applications Via A Combined Approach of Statistical and Empirical Analysis", Proceedings of the Ninth SIAM Conference on Parallel Processing for Scientific Computing (PPSC 1999), March, 1999.
"Instruction-level Microprocessor Modeling of Scientific Applications", Proceedings of the Second International Symposium on High Performance Computing (ISHPC 99), pp. 29-41, May, 1999.
"A Statistical-Empirical Hybrid Approach to Hierarchical Memory Analysis", Proceedings of Euro-Par 2000, pp. 141-148, August, 2000.
"Integer/Floating Point Reconfigurable ALU", Proceedings of the 6th Symposium on New Machine Architectures (SympA'6), pp. 12 pgs, June, 2000.
"Mutable Functional Units and Their Applications on Microprocessors", Proceedings of the International Conference on Computer Design 2001 (ICCD 2001), pp. 234-239, September, 2001.
"Quantifying Locality Effect in Data Access Delay: Memory logP", Proceedings of the 17th IEEE International Parallel and Distributed Processing Symposium (IPDPS 03), pp. 8 pgs, April, 2003.
"Predicting and Evaluating Distributed Communication Performance", Proceedings of the 16th IEEE/ACM International Conference on High Performance Computing and Communications (SC 2004), November, 2004.
"ARGUS: Supercomputing in 1/10 Cubic Meter", Proceedings of the International Conference on Parallel and Distributed Computing and Networks (PDCN 2005), February, 2005.